The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the Equality+LinearArith division in the Incremental Track.
Page generated on 2023-07-06 16:05:24 +0000
Benchmarks: 959 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics:Parallel Performance |
---|
cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|
2021-z3n | 0 | 558031 | 146067.58 | 146110.55 | 208900 | 0 | 58 | 0 |
cvc5 | 0 | 323974 | 42244.26 | 42272.35 | 442957 | 0 | 17 | 0 |
SMTInterpol | 0 | 318266 | 238054.68 | 226921.35 | 448665 | 0 | 215 | 0 |
UltimateEliminator+MathSAT | 0 | 189169 | 13714.53 | 12474.85 | 577762 | 0 | 3 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.