The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the ALIA logic in the Incremental Track.
Page generated on 2023-07-06 16:05:23 +0000
Benchmarks: 24 Time Limit: 1200 seconds Memory Limit: 60 GB
| Parallel Performance |
|---|
| cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
|---|---|---|---|---|---|---|---|
| 2021-z3n | 0 | 202552 | 176.6 | 163.96 | 0 | 0 | 0 |
| cvc5 | 0 | 202550 | 498.64 | 481.89 | 2 | 0 | 0 |
| SMTInterpol | 0 | 202525 | 993.87 | 421.61 | 27 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 189169 | 13714.53 | 12474.85 | 13383 | 3 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.