The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the Equality division in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 2938 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics: This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2653 | 339658.231 | 339772.816 | 285 | 0 | 270 | 0 |
cvc5 | 0 | 2616 | 389552.686 | 389544.16 | 322 | 0 | 307 | 0 |
smtinterpol | 0 | 1632 | 1625150.434 | 1598594.715 | 1306 | 0 | 1287 | 0 |
veriT | 0 | 1594 | 218916.476 | 218950.21 | 190 | 1154 | 150 | 6 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2653 | 339756.531 | 339758.346 | 285 | 0 | 270 | 0 |
cvc5 | 0 | 2616 | 389655.896 | 389527.38 | 322 | 0 | 307 | 0 |
smtinterpol | 0 | 1632 | 2017720.104 | 1521631.519 | 1306 | 0 | 1060 | 0 |
veriT | 0 | 1594 | 218953.346 | 218942.15 | 190 | 1154 | 150 | 6 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.