The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the Bitvec division in the Incremental Track.
Page generated on 2022-08-10 11:18:21 +0000
Benchmarks: 18 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics:| Parallel Performance |
|---|
| cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|
| 2019-Z3n | 0 | 37171 | 7566.366 | 7565.472 | 1685 | 0 | 5 | 0 |
| z3-4.8.17n | 0 | 36646 | 6530.934 | 6529.85 | 2210 | 0 | 5 | 0 |
| cvc5 | 0 | 35832 | 9532.366 | 9529.826 | 3024 | 0 | 7 | 0 |
| Bitwuzla | 0 | 33984 | 12768.602 | 12768.409 | 4872 | 0 | 9 | 0 |
| UltimateEliminator+MathSAT | 0 | 18912 | 1520.278 | 1367.432 | 19944 | 0 | 1 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.