The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the Arith division in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 3119 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics: This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2944 | 226987.333 | 226986.491 | 175 | 0 | 175 | 0 |
cvc5 | 0 | 2926 | 240642.938 | 240624.363 | 193 | 0 | 186 | 0 |
smtinterpol | 0 | 477 | 44451.166 | 42149.282 | 591 | 2051 | 30 | 0 |
veriT | 0 | 169 | 36648.385 | 36648.028 | 97 | 2853 | 27 | 2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2944 | 227024.613 | 226976.731 | 175 | 0 | 175 | 0 |
cvc5 | 0 | 2926 | 240679.278 | 240614.063 | 193 | 0 | 186 | 0 |
smtinterpol | 0 | 477 | 44451.166 | 42149.282 | 591 | 2051 | 30 | 0 |
veriT | 0 | 169 | 36649.025 | 36647.478 | 97 | 2853 | 27 | 2 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.