SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions

SMT-COMP 2023

Rules
Benchmarks
Specs
Model Validation Track
Proof Exhibition Track
Parallel & Cloud Tracks
Participants
Results
Statistics
Comparisons
Slides

Equality (Incremental Track)

Competition results for the Equality division in the Incremental Track.

Page generated on 2023-07-06 16:05:24 +0000

Benchmarks: 2033
Time Limit: 1200 seconds
Memory Limit: 60 GB

Logics:

Winners

Parallel Performance
cvc5

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedAbstainedTimeout Memout
2020-z3n 0 107078536819.18537015.772524990919 0
cvc5 0 2688139903.8740050.993326960932 0
SMTInterpol 0 18342138811.7678847.4334123501621 0
UltimateEliminator+MathSAT 0 00.00.035957700 0
Yices2 0 00.00.035957700 0
Yices2 Fixedn 0 00.00.035957700 0

n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.