The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the UFLRA logic in the Incremental Track.
Page generated on 2022-08-10 11:18:22 +0000
Benchmarks: 935 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
2021-z3n | 0 | 328020 | 142895.396 | 142649.462 | 259981 | 49 | 0 |
z3-4.8.17n | 0 | 323387 | 144497.26 | 144406.71 | 264614 | 50 | 0 |
cvc5 | 0 | 107721 | 45090.133 | 44973.925 | 480280 | 14 | 0 |
smtinterpol | 0 | 100431 | 384226.501 | 376970.118 | 487570 | 226 | 0 |
UltimateEliminator+MathSAT | 0 | 0 | 3875.499 | 1722.927 | 588001 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.