The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_UFLIA logic in the Model Validation Track.
Page generated on 2022-08-10 11:19:11 +0000
Benchmarks: 300 Time Limit: 1200 seconds Memory Limit: 60 GB
| Sequential Performance | Parallel Performance |
|---|---|
| Yices2 | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
|---|---|---|---|---|---|---|
| Yices2 | 0 | 300 | 5.257 | 6.331 | 0 | 0 |
| z3-4.8.17n | 0 | 300 | 28.326 | 27.023 | 0 | 0 |
| cvc5 | 0 | 300 | 177.35 | 177.471 | 0 | 0 |
| OpenSMT | 0 | 300 | 708.15 | 686.102 | 0 | 0 |
| smtinterpol | 0 | 300 | 1168.691 | 513.885 | 0 | 0 |
| MathSATn | 0 | 300 | 1337.807 | 1338.068 | 0 | 0 |
| 2021-SMTInterpoln | 0 | 300 | 2044.718 | 1324.028 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
|---|---|---|---|---|---|---|
| Yices2 | 0 | 300 | 5.257 | 6.331 | 0 | 0 |
| z3-4.8.17n | 0 | 300 | 28.326 | 27.023 | 0 | 0 |
| cvc5 | 0 | 300 | 177.35 | 177.471 | 0 | 0 |
| smtinterpol | 0 | 300 | 1168.691 | 513.885 | 0 | 0 |
| OpenSMT | 0 | 300 | 708.15 | 686.102 | 0 | 0 |
| 2021-SMTInterpoln | 0 | 300 | 2044.718 | 1324.028 | 0 | 0 |
| MathSATn | 0 | 300 | 1337.807 | 1338.068 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.