The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the LIA logic in the Incremental Track.
Page generated on 2022-08-10 11:18:21 +0000
Benchmarks: 6 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
z3-4.8.17n | 0 | 25393 | 9.181 | 8.257 | 0 | 0 | 0 |
2021-cvc5-incn | 0 | 25393 | 22.611 | 21.324 | 0 | 0 | 0 |
cvc5 | 0 | 25393 | 50.384 | 48.962 | 0 | 0 | 0 |
UltimateEliminator+MathSAT | 0 | 25393 | 219.588 | 120.138 | 0 | 0 | 0 |
smtinterpol | 0 | 25391 | 108.133 | 32.633 | 2 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.