The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the AUFDTLIA logic in the Unsat Core Track.
Page generated on 2022-08-10 11:18:51 +0000
Benchmarks: 88 Time Limit: 1200 seconds Memory Limit: 60 GB
| Sequential Performance | Parallel Performance |
|---|---|
| smtinterpol | smtinterpol |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
|---|---|---|---|---|---|---|
| 2021-cvc5-ucn | 0 | 61752 | 173.597 | 167.425 | 0 | 0 |
| z3-4.8.17n | 0 | 61570 | 3637.982 | 3638.7 | 3 | 0 |
| smtinterpol | 0 | 61048 | 3703.412 | 2938.395 | 2 | 0 |
| Vampire | 0 | 60825 | 7402.953 | 1872.789 | 0 | 0 |
| cvc5 | 0 | 1341 | 561.01 | 561.03 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 403.745 | 242.449 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
|---|---|---|---|---|---|---|
| 2021-cvc5-ucn | 0 | 61752 | 173.597 | 167.425 | 0 | 0 |
| z3-4.8.17n | 0 | 61570 | 3638.692 | 3638.53 | 3 | 0 |
| smtinterpol | 0 | 61048 | 3703.412 | 2938.395 | 2 | 0 |
| Vampire | 0 | 60825 | 7402.953 | 1872.789 | 0 | 0 |
| cvc5 | 0 | 1341 | 561.01 | 561.03 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 403.745 | 242.449 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.