The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the UFLIA logic in the Unsat Core Track.
Page generated on 2023-07-06 16:05:43 +0000
Benchmarks: 3915 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
cvc5 | cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2021-cvc5-ucn | 0 | 933724 | 13764.874 | 13738.55 | 187 | 0 |
cvc5 | 0 | 861381 | 19026.384 | 18941.356 | 184 | 0 |
SMTInterpol | 0 | 592956 | 58500.986 | 47404.407 | 1426 | 0 |
Vampire | 0 | 510459 | 7807.92 | 2171.379 | 335 | 0 |
UltimateEliminator+MathSAT | 1 | 1414 | 819.49 | 739.45 | 14 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2021-cvc5-ucn | 0 | 933724 | 13764.874 | 13738.55 | 187 | 0 |
cvc5 | 0 | 861381 | 19026.384 | 18941.356 | 184 | 0 |
SMTInterpol | 0 | 594031 | 63488.546 | 52006.507 | 1411 | 0 |
Vampire | 0 | 511156 | 22755.95 | 5926.942 | 293 | 0 |
UltimateEliminator+MathSAT | 1 | 1414 | 819.49 | 739.45 | 14 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.