SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions

SMT-COMP 2023

Rules
Benchmarks
Specs
Model Validation Track
Proof Exhibition Track
Parallel & Cloud Tracks
Participants
Results
Statistics
Comparisons
Slides

QF_UFLRA (Model Validation Track)

Competition results for the QF_UFLRA logic in the Model Validation Track.

Page generated on 2023-07-06 16:06:00 +0000

Benchmarks: 385
Time Limit: 1200 seconds
Memory Limit: 60 GB

Winners

Sequential PerformanceParallel Performance
Yices2Yices2

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreTimeout Memout
Yices2 0 383 535.614 536.1892 0
SMTInterpol 0 383 2280.009 1023.7692 0
2022-smtinterpoln 0 383 2467.184 1108.1212 0
cvc5 0 382 2339.695 2338.1923 0
OpenSMT 0 378 999.489 998.8317 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreTimeout Memout
Yices2 0 383535.614536.1892 0
SMTInterpol 0 3832280.0091023.7692 0
2022-smtinterpoln 0 3832467.1841108.1212 0
cvc5 0 3822339.6952338.1923 0
OpenSMT 0 378999.489998.8317 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.