The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the QF_LIRA logic in the Single Query Track.
Page generated on 2023-07-06 16:04:54 +0000
Benchmarks: 7 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24s Performance (parallel) |
---|---|---|---|---|
Yices2 | Yices2 | Yices2 | Yices2 | Yices2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
2019-Par4n | 0 | 7 | 244.105 | 123.399 | 7 | 1 | 6 | 0 | 0 | 0 |
Yices2 | 0 | 6 | 153.641 | 153.65 | 6 | 1 | 5 | 1 | 1 | 0 |
cvc5 | 0 | 5 | 10.223 | 7.566 | 5 | 1 | 4 | 2 | 2 | 0 |
SMTInterpol | 0 | 4 | 181.332 | 104.04 | 4 | 1 | 3 | 3 | 3 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
2019-Par4n | 0 | 7 | 244.105 | 123.399 | 7 | 1 | 6 | 0 | 0 | 0 |
Yices2 | 0 | 6 | 153.641 | 153.65 | 6 | 1 | 5 | 1 | 1 | 0 |
cvc5 | 0 | 5 | 10.223 | 7.566 | 5 | 1 | 4 | 2 | 2 | 0 |
SMTInterpol | 0 | 4 | 181.332 | 104.04 | 4 | 1 | 3 | 3 | 3 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | N/A | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 1 | 0.08 | 0.08 | 1 | 1 | 0 | 0 | 6 | 1 | 0 |
2019-Par4n | 0 | 1 | 0.006 | 0.356 | 1 | 1 | 0 | 0 | 6 | 0 | 0 |
cvc5 | 0 | 1 | 2.022 | 2.023 | 1 | 1 | 0 | 0 | 6 | 2 | 0 |
SMTInterpol | 0 | 1 | 26.748 | 9.251 | 1 | 1 | 0 | 0 | 6 | 3 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | N/A | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
2019-Par4n | 0 | 6 | 244.099 | 123.043 | 6 | 0 | 6 | 0 | 1 | 0 | 0 |
Yices2 | 0 | 5 | 153.562 | 153.57 | 5 | 0 | 5 | 1 | 1 | 1 | 0 |
cvc5 | 0 | 4 | 8.202 | 5.542 | 4 | 0 | 4 | 2 | 1 | 2 | 0 |
SMTInterpol | 0 | 3 | 154.583 | 94.788 | 3 | 0 | 3 | 3 | 1 | 3 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 5 | 0.447 | 0.455 | 5 | 1 | 4 | 2 | 2 | 0 |
2019-Par4n | 0 | 5 | 3.025 | 2.718 | 5 | 1 | 4 | 2 | 2 | 0 |
cvc5 | 0 | 5 | 10.223 | 7.566 | 5 | 1 | 4 | 2 | 2 | 0 |
SMTInterpol | 0 | 3 | 44.793 | 15.655 | 3 | 1 | 2 | 4 | 4 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.