SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2023

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QF_Array+Bitvec+LinArith (Model Validation Track)

Competition results for the QF_Array+Bitvec+LinArith division in the Model Validation Track.

Page generated on 2023-06-27 14:59:09 +0000

Benchmarks: 5924
Time Limit: 1200 seconds
Memory Limit: 60 GB

Logics: This division is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreAbstainedTimeout Memout
cvc5 0 5450 141835.535 141768.53462 1
Bitwuzla Fixedn 0 5213 7751.025 7790.8753 0
Bitwuzla 0 5213 7765.231 7812.8313 0
SMTInterpol 0 670 3980.451 3060.9650 0
Yices2 0 39 2599.383 2600.30220 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreAbstainedTimeout Memout
cvc5 0 5450141835.535141768.53462 1
Bitwuzla Fixedn 0 52137751.0257790.8753 0
Bitwuzla 0 52137765.2317812.8313 0
SMTInterpol 0 6703980.4513060.9650 0
Yices2 0 392599.3832600.30220 0

n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.