The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the LIA logic in the Incremental Track.
Page generated on 2023-07-06 16:05:24 +0000
Benchmarks: 6 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
2021-cvc5-incn | 0 | 25393 | 22.34 | 21.38 | 0 | 0 | 0 |
cvc5 | 0 | 25393 | 28.06 | 27.15 | 0 | 0 | 0 |
UltimateEliminator+MathSAT | 0 | 25393 | 280.22 | 162.51 | 0 | 0 | 0 |
SMTInterpol | 0 | 25391 | 89.57 | 30.6 | 2 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.