The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the Bitvec division in the Incremental Track.
Page generated on 2023-07-06 16:05:24 +0000
Benchmarks: 18 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics:| Parallel Performance |
|---|
| cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|
| 2019-Z3n | 0 | 37107 | 4495.59 | 4497.26 | 1749 | 0 | 6 | 0 |
| cvc5 | 0 | 35821 | 2939.26 | 2938.89 | 3035 | 0 | 7 | 0 |
| Bitwuzla | 0 | 34666 | 779.09 | 779.36 | 4190 | 0 | 7 | 0 |
| UltimateEliminator+MathSAT | 0 | 18912 | 437.98 | 237.24 | 19944 | 0 | 1 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.