UFDTLIA (Proof Exhibition Track)

Competition results for the UFDTLIA logic in the Proof Exhibition Track.

Page generated on 2022-08-10 11:19:33 +0000

Benchmarks: 202
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver	Error Score	Correct Score	CPU Time Score	Wall Time Score	Unsolved	Timeout	Memout
cvc5-lfsc	0	33	205772.289	205847.376	169	169	0
cvc5	0	32	205907.098	205975.14	170	169	0
smtinterpol	0	26	212068.849	211911.409	176	176	0

Parallel Performance

Solver	Error Score	Correct Score	CPU Time Score	Wall Time Score	Unsolved	Timeout	Memout
cvc5-lfsc	0	33	205838.499	205839.456	169	169	0
cvc5	0	32	205974.218	205967.07	170	169	0
smtinterpol	0	26	214616.339	211788.309	176	175	0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.