The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_UFLRA logic in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 300 Time Limit: 1200 seconds Memory Limit: 60 GB
This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 299 | 3369.027 | 2235.576 | 1 | 1 | 0 |
cvc5-lfsc | 0 | 261 | 47581.774 | 47576.863 | 39 | 39 | 0 |
veriT | 0 | 246 | 115.018 | 105.324 | 54 | 0 | 0 |
cvc5 | 0 | 20 | 330219.289 | 330211.007 | 280 | 272 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 299 | 3369.027 | 2235.576 | 1 | 1 | 0 |
cvc5-lfsc | 0 | 261 | 47582.714 | 47576.473 | 39 | 39 | 0 |
veriT | 0 | 246 | 115.018 | 105.324 | 54 | 0 | 0 |
cvc5 | 0 | 20 | 330250.889 | 330199.207 | 280 | 272 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.