SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2022

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QF_UFIDL (Proof Exhibition Track)

Competition results for the QF_UFIDL logic in the Proof Exhibition Track.

Page generated on 2022-08-10 11:19:33 +0000

Benchmarks: 300
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreUnsolvedTimeout Memout
smtinterpol 0 213 117228.39 112197.7348788 0
cvc5-lfsc 0 88 270262.994 270283.771212212 0
veriT 0 37 127227.532 127094.46526390 6
cvc5 0 9 346816.754 346874.062291288 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedTimeout Memout
smtinterpol 0 213120549.06111610.3088785 0
cvc5-lfsc 0 88270307.604270274.811212212 0
veriT 0 37127255.662127083.55526389 6
cvc5 0 9346878.264346858.832291288 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.