The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the QF_UFDT logic in the Unsat Core Track.
Page generated on 2022-08-10 11:18:51 +0000
Benchmarks: 100 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
cvc5 | cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
z3-4.8.17n | 0 | 667626 | 45037.188 | 45054.79 | 17 | 0 |
2021-z3n | 0 | 654015 | 49161.835 | 50037.572 | 21 | 0 |
cvc5 | 0 | 113438 | 106345.767 | 106360.79 | 78 | 0 |
smtinterpol | 0 | 18704 | 116118.859 | 114152.087 | 90 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
z3-4.8.17n | 0 | 667626 | 45045.088 | 45054.1 | 17 | 0 |
2021-z3n | 0 | 654015 | 49790.805 | 50036.522 | 21 | 0 |
cvc5 | 0 | 113438 | 106355.477 | 106357.51 | 78 | 0 |
smtinterpol | 0 | 27151 | 116671.989 | 113636.044 | 87 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.