The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_UFDT logic in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 100 Time Limit: 1200 seconds Memory Limit: 60 GB
This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 13 | 116077.972 | 113938.231 | 87 | 91 | 0 |
cvc5 | 0 | 0 | 119964.34 | 120005.7 | 100 | 99 | 1 |
cvc5-lfsc | 0 | 0 | 119965.47 | 120005.41 | 100 | 99 | 1 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 13 | 116325.342 | 113009.605 | 87 | 87 | 0 |
cvc5 | 0 | 0 | 120000.0 | 120000.0 | 100 | 99 | 1 |
cvc5-lfsc | 0 | 0 | 120000.0 | 120000.0 | 100 | 99 | 1 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.