The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_LIRA logic in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 5 Time Limit: 1200 seconds Memory Limit: 60 GB
This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 3 | 2747.695 | 2613.578 | 2 | 2 | 0 |
cvc5-lfsc | 0 | 1 | 4946.928 | 4947.318 | 4 | 4 | 0 |
veriT | 0 | 0 | 1214.576 | 1214.575 | 5 | 1 | 0 |
cvc5 | 0 | 0 | 5998.91 | 6000.34 | 5 | 5 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
smtinterpol | 0 | 3 | 2747.695 | 2613.578 | 2 | 2 | 0 |
cvc5-lfsc | 0 | 1 | 4947.198 | 4947.198 | 4 | 4 | 0 |
veriT | 0 | 0 | 1214.656 | 1214.495 | 5 | 1 | 0 |
cvc5 | 0 | 0 | 6000.0 | 6000.0 | 5 | 5 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.