SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2022

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Proof Exhibition Track
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QF_IDL (Proof Exhibition Track)

Competition results for the QF_IDL logic in the Proof Exhibition Track.

Page generated on 2022-08-10 11:19:33 +0000

Benchmarks: 458
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreUnsolvedTimeout Memout
veriT 0 351 138754.364 138601.172107107 0
smtinterpol 0 291 234269.056 226210.539167170 0
cvc5-lfsc 0 266 264689.261 264754.343192192 0
cvc5 0 45 488397.733 488410.394413403 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedTimeout Memout
veriT 0 351138780.864138595.952107107 0
smtinterpol 0 291237567.306225214.371167165 0
cvc5-lfsc 0 266264758.431264745.013192192 0
cvc5 0 45488505.623488388.504413403 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.