The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_DT logic in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 2261 Time Limit: 1200 seconds Memory Limit: 60 GB
This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2214 | 59592.128 | 59611.248 | 47 | 47 | 0 |
smtinterpol | 0 | 2210 | 61866.285 | 60195.794 | 51 | 48 | 0 |
cvc5 | 0 | 2209 | 62498.77 | 62518.089 | 52 | 52 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2214 | 59609.848 | 59608.638 | 47 | 47 | 0 |
smtinterpol | 0 | 2210 | 62467.145 | 59409.717 | 51 | 45 | 0 |
cvc5 | 0 | 2209 | 62517.4 | 62515.019 | 52 | 52 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.