The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_BVFPLRA logic in the Incremental Track.
Page generated on 2022-08-10 11:18:21 +0000
Benchmarks: 63 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
MathSATn | 0 | 32736 | 166.766 | 159.854 | 0 | 0 | 0 |
cvc5 | 0 | 32736 | 281.349 | 279.433 | 0 | 0 | 0 |
Bitwuzla | 0 | 32736 | 1012.657 | 1011.71 | 0 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.