SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2022

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Proof Exhibition Track
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AUFDTLIA (Proof Exhibition Track)

Competition results for the AUFDTLIA logic in the Proof Exhibition Track.

Page generated on 2022-08-10 11:19:33 +0000

Benchmarks: 88
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreUnsolvedTimeout Memout
smtinterpol 0 74 3089.813 2680.187142 0
cvc5-lfsc 0 60 37291.476 37269.272828 0
cvc5 0 28 72111.774 72113.0256059 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedTimeout Memout
smtinterpol 0 743089.8132680.187142 0
cvc5-lfsc 0 6037293.85637268.072828 0
cvc5 0 2872121.88472109.8156059 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.