The International Satisfiability Modulo Theories (SMT) Competition.
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Introduction
Benchmark Submission
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SMT-LIB
Previous Editions
Competing | yes |
Single Query Track | BV, LIA, LRA, NIA, NRA |
Incremental Track | |
Unsat Core Track | |
Model Validation Track | |
Proof Exhibition Track | |
Cloud Track | |
Parallel Track | |
Preliminary ID | 36836 |
Final ID | 39111 |
Seed | 0 |
System Description | Yices-QS, an extension of Yices for quantified satisfiability |
Variant of Submission ID | |
Derived from Solver | Yices2 |
Wrapped Solvers | |
Website | https://github.com/disteph/yicesQS |
Team Members | Stephane Graham-Lengrand |