The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the AUFNIRA logic in the Incremental Track.
Page generated on 2021-07-18 17:30:28 +0000
Benchmarks: 165 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5-inc |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
cvc5-inc | 0 | 3108 | 26563.377 | 26562.888 | 344 | 22 | 0 |
2019-CVC4-incn | 0 | 3094 | 27553.964 | 27553.877 | 358 | 22 | 0 |
2020-CVC4-incn | 0 | 3094 | 27687.173 | 27686.135 | 358 | 22 | 0 |
2020-z3n | 0 | 2875 | 45620.178 | 45620.914 | 577 | 34 | 0 |
z3n | 0 | 2791 | 47843.964 | 47844.447 | 661 | 37 | 0 |
SMTInterpol | 0 | 0 | 202.574 | 102.526 | 3452 | 0 | 0 |
UltimateEliminator+MathSAT | 0 | 0 | 688.173 | 313.708 | 3452 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.