The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_UFLRA division in the Unsat Core Track.
Page generated on 2020-07-04 11:49:33 +0000
Benchmarks: 101 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
CVC4-uc | CVC4-uc |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|
z3n | 0 | 60 | 67.638 | 67.674 | 0 | 0 | |
MathSAT5n | 0 | 60 | 115.612 | 115.758 | 0 | 0 | |
CVC4-uc | 0 | 59 | 258.125 | 258.358 | 0 | 0 | |
Yices2 | 0 | 58 | 20.992 | 21.809 | 0 | 0 | |
Yices2-fixedn | 0 | 58 | 26.639 | 21.128 | 0 | 0 | |
SMTInterpol-fixedn | 0 | 58 | 1130.174 | 868.786 | 0 | 0 | |
SMTInterpol | 0 | 58 | 1130.381 | 878.416 | 0 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|
z3n | 0 | 60 | 67.638 | 67.674 | 0 | 0 | |
MathSAT5n | 0 | 60 | 115.612 | 115.758 | 0 | 0 | |
CVC4-uc | 0 | 59 | 258.125 | 258.358 | 0 | 0 | |
Yices2-fixedn | 0 | 58 | 26.639 | 21.128 | 0 | 0 | |
Yices2 | 0 | 58 | 20.992 | 21.809 | 0 | 0 | |
SMTInterpol-fixedn | 0 | 58 | 1130.174 | 868.786 | 0 | 0 | |
SMTInterpol | 0 | 58 | 1130.381 | 878.416 | 0 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.