SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2020

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QF_RDL (Model Validation Track)

Competition results for the QF_RDL division in the Model Validation Track.

Page generated on 2020-07-04 11:50:14 +0000

Benchmarks: 109
Time Limit: 1200 seconds
Memory Limit: 60 GB

This division is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreTimeout Memout
Yices2-fixed Model Validationn 0 109 495.298 495.4020 0
Yices2 Model Validation 0 109 495.323 495.4040 0
CVC4-mv 0 106 6980.83 6981.7133 0
MathSAT5-mvn 0 106 7744.608 7745.9223 0
z3n 0 103 9489.126 9485.6416 0
SMTInterpol 0 101 15635.556 14813.8078 0
SMTInterpol-fixedn 0 101 15653.703 14841.7918 0

Parallel Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreTimeout Memout
Yices2-fixed Model Validationn 0 109 495.298 495.4020 0
Yices2 Model Validation 0 109 495.323 495.4040 0
CVC4-mv 0 106 6981.04 6981.5533 0
MathSAT5-mvn 0 106 7744.838 7745.8423 0
z3n 0 103 9489.456 9485.4016 0
SMTInterpol 0 101 15635.556 14813.8078 0
SMTInterpol-fixedn 0 101 15653.703 14841.7918 0

n Non-competing.