The International Satisfiability Modulo Theories (SMT) Competition.
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Page generated on 2021-07-14 14:12:27 +0000
| Parallel Performance |
|---|
| CVC4-inc |
| Solver | Correct Score | Time Score | Division |
|---|---|---|---|
| CVC4-inc | 0.07036068 | 3.776e-05 | UF |
| CVC4-inc | 0.00481985 | 0.0 | UFLRA |
| Yices2 incremental | 0.00459725 | 0.00584165 | QF_UFLIA |
| Yices2 incremental | 0.00210543 | 0.00382378 | QF_AUFLIA |
| Bitwuzla | 0.00091747 | 0.02921149 | QF_ABV |
| Yices2 incremental | 0.00079132 | 0.00218633 | QF_LIA |
| Yices2 incremental | 0.0006343 | 0.00163674 | QF_AUFBV |
| CVC4-inc | 0.00031699 | 0.00373092 | QF_BV |
| Bitwuzla | 0.00019894 | 0.07662971 | QF_UFBV |
| Yices2 incremental | 0.00017244 | 0.0 | QF_LRA |
| SMTInterpol | 8.954e-05 | 0.02106226 | QF_UFLRA |
| CVC4-inc | 8.032e-05 | 0.00054653 | LRA |
| Yices2 incremental | 0.0 | 0.03659518 | QF_UF |
| SMTInterpol | 0.0 | 0.00033411 | LIA |
n Non-competing.
e Experimental.