The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the UFNRA logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 4
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 5 | 0.39 | 0.39 | 0 | 4 | 0 | 0 | 0 |
| SMTInterpol | 0 | 2 | 5153.83 | 4805.96 | 0 | 4 | 0 | 4 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 14.62 | 7.89 | 0 | 4 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 5 | 0.39 | 0.39 | 0 | 4 | 0 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 14.62 | 7.89 | 0 | 4 | 0 | 0 | 0 |