SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2025

UFDTNIRA (Unsat Core Track)

Competition results for the UFDTNIRA logic in the Unsat Core Track. Chart

Results were generated on 2025-08-11

Benchmarks: 1714
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential Performance Parallel Performance SAT Performance (parallel) UNSAT Performance (parallel) 24 seconds Performance (parallel)
cvc5 cvc5 - cvc5 cvc5

Sequential Performance Performance

Solver Error Score Correct Score CPU Time Score Wall Time Score Solved Solved UNSAT Unsolved Abstained Timeout Memout
cvc5 0 65289 332.41 543.03 1706 1706 8 0 2 0
SMTInterpol 0 56610 6907.02 3910.50 1405 1405 309 0 156 0

Parallel Performance Performance

Solver Error Score Correct Score CPU Time Score Wall Time Score Solved Solved UNSAT Unsolved Abstained Timeout Memout
cvc5 0 65289 332.41 543.03 1706 1706 8 0 2 0
SMTInterpol 0 56610 6907.02 3910.50 1405 1405 309 0 156 0

UNSAT Performance Performance

Solver Error Score Correct Score CPU Time Score Wall Time Score Solved Solved UNSAT Unsolved Abstained Timeout Memout
cvc5 0 65289 332.41 543.03 1706 1706 8 0 2 0
SMTInterpol 0 56610 6907.02 3910.50 1405 1405 309 0 156 0

24 seconds Performance Performance

Solver Error Score Correct Score CPU Time Score Wall Time Score Solved Solved UNSAT Unsolved Abstained Timeout Memout
cvc5 0 65289 332.41 543.03 1706 1706 6 2 0 0
SMTInterpol 0 56081 4517.28 1946.82 1392 1392 53 269 0 0