SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2025

UFDTLIA (Unsat Core Track)

Competition results for the UFDTLIA logic in the Unsat Core Track. Chart

Results were generated on 2025-08-11

Benchmarks: 627
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
cvc5cvc5-cvc5cvc5

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc5032599521981.1022048.765255251020710
SMTInterpol0688165761.074313.4612812849903590

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc5032599521981.1022048.765255251020710
SMTInterpol0693586980.915251.2512812849903590

UNSAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc5032599521981.1022048.765255251020710
SMTInterpol0693586980.915251.2512812849903590

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc502880461513.581574.974954951611600
SMTInterpol066038679.30253.28116116051100