SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2025

UFBVLIA (Single Query Track)

Competition results for the UFBVLIA logic in the Single Query Track. Chart

Results were generated on 2025-08-11

Benchmarks: 208
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
cvc5cvc5-cvc5cvc5

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc50226.4726.7220220602060
SMTInterpol000.000.0000020802080
UltimateEliminator+MathSAT000.000.0000020806548

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc50226.4726.7220220602060
SMTInterpol000.000.0000020802080
UltimateEliminator+MathSAT000.000.0000020806548

SAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
SMTInterpol000.000.0000020188200
UltimateEliminator+MathSAT000.000.000002018800
cvc5000.000.0000020188200

UNSAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc50226.4726.72202620060
SMTInterpol000.000.00000820080
UltimateEliminator+MathSAT000.000.00000820000

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc5011.081.20101020700