The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the UFBVDTNIA logic in the Unsat Core Track. Chart
Results were generated on 2025-08-11
Benchmarks: 157
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| cvc5 | cvc5 | - | cvc5 | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 56789 | 115.61 | 134.91 | 157 | 157 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22616 | 4577.55 | 3072.19 | 125 | 125 | 32 | 0 | 6 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 56789 | 115.61 | 134.91 | 157 | 157 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22616 | 4577.55 | 3072.19 | 125 | 125 | 32 | 0 | 6 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 56789 | 115.61 | 134.91 | 157 | 157 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22616 | 4577.55 | 3072.19 | 125 | 125 | 32 | 0 | 6 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 44142 | 45.73 | 64.78 | 155 | 155 | 0 | 2 | 0 | 0 |
| SMTInterpol | 0 | 19118 | 550.04 | 221.46 | 121 | 121 | 0 | 36 | 0 | 0 |