The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFLRA logic in the Parallel Track. Chart
Results were generated on 2025-08-11
Benchmarks: 6
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| - | - | - | - | - |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| SMTS | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 3 | 0 |
| Yices2 | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 6 | 0 |
| SMTS (32 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 0 | 0 |
| SMTS (64 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| SMTS | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 4 | 2 | 3 | 0 |
| Yices2 | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 4 | 2 | 4 | 0 |
| SMTS (32 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 4 | 2 | 0 | 0 |
| SMTS (64 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 4 | 2 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| SMTS (32 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 0 | 0 |
| SMTS (64 cores) n | 0 | 0 | 0.00 | 0.00 | 0 | 0 | 0 | 6 | 0 | 0 | 0 |