SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2025

QF_UFLRA (Model Validation Track)

Competition results for the QF_UFLRA logic in the Model Validation Track. Chart

Results were generated on 2025-08-11

Benchmarks: 385
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Yices2Yices2Yices2-Yices2

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
Yices20383295.34342.813833832020
SMTInterpol03833147.321882.553833832020
cvc50382337.98385.123823823030
OpenSMT0378920.18967.463783787070

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
Yices20383295.34342.813833832020
SMTInterpol03833147.321882.553833832020
cvc50382337.98385.123823823030
OpenSMT0378920.18967.463783787070

SAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
Yices20383295.34342.813833832020
SMTInterpol03833147.321882.553833832020
cvc50382337.98385.123823823030
OpenSMT0378920.18967.463783787070

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
Yices2038285.76133.083823820300
cvc50378164.29210.903783780700
SMTInterpol03781204.18514.383783780700
OpenSMT0372296.47342.8937237201300