The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFIDL logic in the Unsat Core Track. Chart
Results were generated on 2025-08-11
Benchmarks: 113
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| Yices2 | Yices2 | - | Yices2 | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 786948 | 25492.19 | 25505.09 | 77 | 77 | 36 | 0 | 35 | 0 |
| OpenSMT | 0 | 718780 | 23247.72 | 23260.69 | 74 | 74 | 39 | 0 | 39 | 0 |
| cvc5 | 0 | 67413 | 4409.88 | 4413.22 | 19 | 19 | 94 | 0 | 94 | 0 |
| OpenSMT (min-ucore) | 0 | 20675 | 1885.71 | 1888.14 | 17 | 17 | 96 | 0 | 96 | 0 |
| SMTInterpol | 0 | 19 | 5.36 | 5.67 | 13 | 13 | 100 | 0 | 91 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 786948 | 25492.19 | 25505.09 | 77 | 77 | 36 | 0 | 35 | 0 |
| OpenSMT | 0 | 718780 | 23247.72 | 23260.69 | 74 | 74 | 39 | 0 | 39 | 0 |
| cvc5 | 0 | 67413 | 4409.88 | 4413.22 | 19 | 19 | 94 | 0 | 94 | 0 |
| OpenSMT (min-ucore) | 0 | 20675 | 1885.71 | 1888.14 | 17 | 17 | 96 | 0 | 96 | 0 |
| SMTInterpol | 0 | 19 | 5.36 | 5.67 | 13 | 13 | 100 | 0 | 91 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 786948 | 25492.19 | 25505.09 | 77 | 77 | 36 | 0 | 35 | 0 |
| OpenSMT | 0 | 718780 | 23247.72 | 23260.69 | 74 | 74 | 39 | 0 | 39 | 0 |
| cvc5 | 0 | 67413 | 4409.88 | 4413.22 | 19 | 19 | 94 | 0 | 94 | 0 |
| OpenSMT (min-ucore) | 0 | 20675 | 1885.71 | 1888.14 | 17 | 17 | 96 | 0 | 96 | 0 |
| SMTInterpol | 0 | 19 | 5.36 | 5.67 | 13 | 13 | 100 | 0 | 91 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 27350 | 50.45 | 52.43 | 16 | 16 | 0 | 97 | 0 | 0 |
| OpenSMT | 0 | 19 | 1.87 | 3.49 | 13 | 13 | 0 | 100 | 0 | 0 |
| OpenSMT (min-ucore) | 0 | 19 | 2.01 | 3.63 | 13 | 13 | 0 | 100 | 0 | 0 |
| cvc5 | 0 | 19 | 2.10 | 3.82 | 13 | 13 | 0 | 100 | 0 | 0 |
| SMTInterpol | 0 | 19 | 5.36 | 5.67 | 13 | 13 | 0 | 100 | 0 | 0 |