The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFDTNIA logic in the Model Validation Track. Chart
Results were generated on 2025-08-11
Benchmarks: 18
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| SMTInterpol | SMTInterpol | SMTInterpol | - | SMTInterpol |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 18 | 1077.47 | 803.27 | 18 | 18 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 18 | 3577.00 | 3579.72 | 18 | 18 | 0 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 18 | 1077.47 | 803.27 | 18 | 18 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 18 | 3577.00 | 3579.72 | 18 | 18 | 0 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 18 | 1077.47 | 803.27 | 18 | 18 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 18 | 3577.00 | 3579.72 | 18 | 18 | 0 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 8 | 113.61 | 51.33 | 8 | 8 | 0 | 10 | 0 | 0 |
| cvc5 | 0 | 7 | 18.22 | 19.07 | 7 | 7 | 0 | 11 | 0 | 0 |