The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFDT logic in the Unsat Core Track. Chart
Results were generated on 2025-08-11
Benchmarks: 100
Time Limit: 1200 seconds
Memory Limit: 30720 GB
Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
---|---|---|---|---|
cvc5 | cvc5 | - | cvc5 | - |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
cvc5 | 0 | 137457 | 17239.11 | 17245.45 | 29 | 29 | 71 | 0 | 70 | 0 |
SMTInterpol | 0 | 102212 | 8868.21 | 4711.65 | 15 | 15 | 85 | 0 | 69 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
cvc5 | 0 | 137457 | 17239.11 | 17245.45 | 29 | 29 | 71 | 0 | 70 | 0 |
SMTInterpol | 0 | 102212 | 8868.21 | 4711.65 | 15 | 15 | 85 | 0 | 69 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|
cvc5 | 0 | 137457 | 17239.11 | 17245.45 | 29 | 29 | 71 | 0 | 70 | 0 |
SMTInterpol | 0 | 102212 | 8868.21 | 4711.65 | 15 | 15 | 85 | 0 | 69 | 0 |