The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_IDL logic in the Unsat Core Track. Chart
Results were generated on 2025-08-11
Benchmarks: 100
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| cvc5 | cvc5 | - | cvc5 | SMTInterpol |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 525707 | 6510.32 | 6513.99 | 21 | 21 | 79 | 0 | 79 | 0 |
| SMTInterpol | 0 | 290599 | 1635.57 | 787.64 | 12 | 12 | 88 | 0 | 82 | 0 |
| Yices2 | 0 | 150327 | 9395.89 | 9399.03 | 15 | 15 | 85 | 0 | 85 | 0 |
| OpenSMT | 0 | 95776 | 6849.07 | 6851.51 | 11 | 11 | 89 | 0 | 89 | 0 |
| OpenSMT (min-ucore) | 0 | 19384 | 23.59 | 23.71 | 1 | 1 | 99 | 0 | 99 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 525707 | 6510.32 | 6513.99 | 21 | 21 | 79 | 0 | 79 | 0 |
| SMTInterpol | 0 | 290599 | 1635.57 | 787.64 | 12 | 12 | 88 | 0 | 82 | 0 |
| Yices2 | 0 | 150327 | 9395.89 | 9399.03 | 15 | 15 | 85 | 0 | 85 | 0 |
| OpenSMT | 0 | 95776 | 6849.07 | 6851.51 | 11 | 11 | 89 | 0 | 89 | 0 |
| OpenSMT (min-ucore) | 0 | 19384 | 23.59 | 23.71 | 1 | 1 | 99 | 0 | 99 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 525707 | 6510.32 | 6513.99 | 21 | 21 | 79 | 0 | 79 | 0 |
| SMTInterpol | 0 | 290599 | 1635.57 | 787.64 | 12 | 12 | 88 | 0 | 82 | 0 |
| Yices2 | 0 | 150327 | 9395.89 | 9399.03 | 15 | 15 | 85 | 0 | 85 | 0 |
| OpenSMT | 0 | 95776 | 6849.07 | 6851.51 | 11 | 11 | 89 | 0 | 89 | 0 |
| OpenSMT (min-ucore) | 0 | 19384 | 23.59 | 23.71 | 1 | 1 | 99 | 0 | 99 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 60927 | 134.23 | 66.43 | 6 | 6 | 0 | 94 | 0 | 0 |
| OpenSMT (min-ucore) | 0 | 19384 | 23.59 | 23.71 | 1 | 1 | 0 | 99 | 0 | 0 |
| cvc5 | 0 | 19359 | 6.59 | 6.71 | 1 | 1 | 0 | 99 | 0 | 0 |
| OpenSMT | 0 | 19161 | 14.40 | 14.53 | 1 | 1 | 0 | 99 | 0 | 0 |