SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2025

QF_Equality_LinearArith (Model Validation Track)

Competition results for the QF_Equality_LinearArith division in the Model Validation Track. Chart

Results were generated on 2025-08-11

Benchmarks: 891
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Logics:

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
OpenSMTOpenSMTOpenSMT-SMTInterpol

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
OpenSMT087510359.0810469.75875875160160
SMTInterpol086314112.2110956.23863863280280
cvc5085726524.0026633.68857857340340
Yices2082315704.7315809.28823823680680

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
OpenSMT087510359.0810469.75875875160160
SMTInterpol086314112.2110956.23863863280280
cvc5085726524.0026633.68857857340340
Yices2082315704.7315809.28823823680680

SAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
OpenSMT087510359.0810469.75875875160160
SMTInterpol086314112.2110956.23863863280280
cvc5085726524.0026633.68857857340340
Yices2082315704.7315809.28823823680680

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATUnsolvedAbstainedTimeoutMemout
SMTInterpol08353380.241472.3083583505600
OpenSMT08241228.241331.0282482406700
Yices20785261.28358.75785785010600
cvc50778454.33550.04778778011300