The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_BVLRA logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 523
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| Yices2 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 16461 | 458.40 | 458.40 | 0 | 523 | 0 | 2 | 0 |
| SMTInterpol | 0 | 16451 | 4016.24 | 4016.24 | 0 | 523 | 0 | 4 | 0 |
| cvc5 | 0 | 16398 | 1747.40 | 1747.40 | 0 | 523 | 0 | 8 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 16264 | 293.34 | 293.34 | 0 | 520 | 3 | 2 | 0 |
| cvc5 | 0 | 15325 | 710.37 | 710.37 | 0 | 510 | 13 | 8 | 0 |
| SMTInterpol | 0 | 13657 | 2018.60 | 2018.60 | 0 | 487 | 36 | 2 | 0 |