The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_BVFPLRA logic in the Model Validation Track. Chart
Results were generated on 2025-08-11
Benchmarks: 120
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| Bitwuzla | Bitwuzla | Bitwuzla | - | Bitwuzla |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 120 | 151.24 | 165.84 | 120 | 120 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 116 | 499.28 | 513.45 | 116 | 116 | 4 | 0 | 1 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 120 | 151.24 | 165.84 | 120 | 120 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 116 | 499.28 | 513.45 | 116 | 116 | 4 | 0 | 1 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 120 | 151.24 | 165.84 | 120 | 120 | 0 | 0 | 0 | 0 |
| cvc5 | 0 | 116 | 499.28 | 513.45 | 116 | 116 | 4 | 0 | 1 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 118 | 76.98 | 91.32 | 118 | 118 | 0 | 2 | 0 | 0 |
| cvc5 | 0 | 112 | 115.94 | 129.56 | 112 | 112 | 3 | 5 | 0 | 0 |