The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_AUFBVLIA logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 300
Time Limit: 1200 seconds
Memory Limit: 30720 GB
Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
---|---|---|---|
Yices2 | - | - | Yices2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 545 | 9877.04 | 9880.39 | 0 | 300 | 0 | 7 | 0 |
SMTInterpol | 0 | 516 | 77481.83 | 76133.79 | 0 | 300 | 0 | 36 | 0 |
cvc5 | 0 | 505 | 66961.64 | 66974.88 | 0 | 300 | 0 | 39 | 4 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 506 | 600.85 | 600.85 | 0 | 277 | 23 | 0 | 0 |
SMTInterpol | 0 | 300 | 974.05 | 974.05 | 0 | 166 | 134 | 0 | 0 |
cvc5 | 0 | 299 | 677.73 | 677.73 | 0 | 169 | 131 | 0 | 0 |