The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_AUFBV logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 31
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| Bitwuzla | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 967 | 3060.18 | 3060.18 | 0 | 31 | 0 | 0 | 0 |
| Yices2 | 0 | 949 | 2209.28 | 2209.28 | 0 | 31 | 0 | 7 | 0 |
| cvc5 | 0 | 726 | 6924.77 | 6924.77 | 0 | 31 | 0 | 16 | 0 |
| SMTInterpol | 0 | 92 | 10929.46 | 10203.05 | 0 | 31 | 0 | 19 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 263 | 62.70 | 62.70 | 0 | 20 | 11 | 2 | 0 |
| Bitwuzla | 0 | 216 | 28.55 | 28.55 | 0 | 18 | 13 | 0 | 0 |
| SMTInterpol | 0 | 50 | 102.24 | 102.24 | 0 | 19 | 12 | 7 | 0 |
| cvc5 | 0 | 35 | 14.87 | 14.87 | 0 | 11 | 20 | 1 | 0 |