SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2025

BVFPLRA (Unsat Core Track)

Competition results for the BVFPLRA logic in the Unsat Core Track. Chart

Results were generated on 2025-08-11

Benchmarks: 12
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
BitwuzlaBitwuzla-BitwuzlaBitwuzla

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
Bitwuzla0503.334.6611111010
cvc504911.0712.6112120000
UltimateEliminator+MathSAT000.000.000012000

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
Bitwuzla0503.334.6611111010
cvc504911.0712.6112120000
UltimateEliminator+MathSAT000.000.000012000

UNSAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
Bitwuzla0503.334.6611111010
cvc504911.0712.6112120000
UltimateEliminator+MathSAT000.000.000012000

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
Bitwuzla0503.334.6611110100
cvc504911.0712.6112120000
UltimateEliminator+MathSAT000.000.000012000