The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the BVFPLRA logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 9
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| Bitwuzla | - | - | Bitwuzla |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 4797 | 219.13 | 219.13 | 0 | 9 | 0 | 2 | 0 |
| cvc5 | 0 | 2964 | 19.27 | 19.27 | 0 | 9 | 0 | 6 | 0 |
| UltimateEliminator+MathSAT | 0 | 2157 | 81.27 | 81.27 | 0 | 9 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Bitwuzla | 0 | 3727 | 51.38 | 51.38 | 0 | 8 | 1 | 1 | 0 |
| cvc5 | 0 | 2964 | 19.27 | 19.27 | 0 | 9 | 0 | 6 | 0 |
| UltimateEliminator+MathSAT | 0 | 2157 | 81.27 | 81.27 | 0 | 9 | 0 | 0 | 0 |