The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the AUFDTNIRA logic in the Unsat Core Track. Chart
Results were generated on 2025-08-11
Benchmarks: 539
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| cvc5 | cvc5 | - | cvc5 | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 27740 | 637.50 | 704.20 | 539 | 539 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22020 | 1343.93 | 672.50 | 453 | 453 | 86 | 0 | 84 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 27740 | 637.50 | 704.20 | 539 | 539 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22020 | 1343.93 | 672.50 | 453 | 453 | 86 | 0 | 84 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 27740 | 637.50 | 704.20 | 539 | 539 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 22020 | 1343.93 | 672.50 | 453 | 453 | 86 | 0 | 84 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 27704 | 100.31 | 166.81 | 538 | 538 | 0 | 1 | 0 | 0 |
| SMTInterpol | 0 | 22020 | 1343.93 | 672.50 | 453 | 453 | 2 | 84 | 0 | 0 |